/** Reset all of the control signals (after each instruction execution in Stage 5) */
public static void reset_control_signals() {
cpu.c_reg_address_A = 0;
cpu.c_reg_address_B = 0;
cpu.c_reg_address_C = 0;
cpu.c_mux_B_select = 0;
cpu.c_mux_C_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_RF_write = 0;
cpu.c_condition_signal = 0;
cpu.c_ALU_op = 0;
cpu.RA = 0;
cpu.RB = 0;
cpu.RM = 0;
cpu.RY = 0;
cpu.RZ = 0;
}
/**
* ALU method, note that I was unsure of the typical ALU operation codes so I used the following:
* 0: And, 1: Or, 2: Add, 3: If less-than, 4: If greater-than, 5: If greater-than or equal 6:
* Substract, 7: If less-than or equal, 8: If-equal, 9: Not equal
*/
public static int ALU(int ALU_op, int input_A, int input_B) {
switch (ALU_op) {
case 0: // And
return input_A & input_B;
case 1: // Or
return input_A | input_B;
case 2: // Add
return input_A + input_B;
case 3: // If less-than
if (input_A < input_B) {
cpu.c_condition_signal = 1; // Set condition signal
}
break;
case 4: // If greater-than
if (input_A > input_B) {
cpu.c_condition_signal = 1; // Set condition signal
}
break;
case 5: // If greater-than or equal
if (input_A >= input_B) {
cpu.c_condition_signal = 1; // Set condition signal
}
break;
case 6: // Subtract
return input_A - input_B;
case 7: // If less-than or equal
if (input_A <= input_B) {
cpu.c_condition_signal = 1; // Set condition signal
}
break;
case 8: // If equal
if (input_A == input_B) {
cpu.c_condition_signal = 1; // Set condition signal
}
break;
case 9: // If not-equal
if (input_A != input_B) {
cpu.c_condition_signal = 1; // Set condition signal
}
}
return 0;
}
/** Decode - Stage 2 */
public static void stage2_decode() throws IOException {
String binary_rep = pad_binary(Integer.toBinaryString(cpu.IR), 32);
String op_code = (String) binary_rep.subSequence(binary_rep.length() - 6, binary_rep.length());
String r_src = ""; // Source Register (Rsrc)
String r_dst = ""; // Destination Register (Rdst)
String i_val = ""; // Immediate value (Imm16)
switch (op_code) {
case definitions
.ADDI: // ---------------------------- ADDI (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst = binary_rep.substring(5, 10);
i_val = binary_rep.substring(10, 26);
cpu.c_RF_write = 1; // Writing to a register, therefore set RF_write control signal
cpu.c_reg_address_A = Integer.parseInt(r_src, 2); // Calculate reg_address_A
cpu.RA = cpu.R[Integer.parseInt(r_src, 2)]; // Set RA
cpu.c_mux_B_select = 1; // Using immediate value, therefore set mux_B to 1
cpu.c_mux_Y_select = 0; // Using the value from the ALU, therefore set mux_Y to 0
cpu.c_ALU_op = 2; // Set the ALU operation to 2 (Add)
System.out.println(
"Add Immediate: Store in R"
+ Integer.parseInt(r_dst, 2)
+ ", Add: ("
+ cpu.RA
+ ")+("
+ calc_imm_val(i_val)
+ ")");
break;
case definitions
.BR: // ---------------------------- BR (B-Type) ---------------------------- //
cpu.c_condition_signal = 1;
i_val = binary_rep.substring(0, 26);
// System.out.println("Branch to address:"+calc_imm_val(i_val));
break;
case definitions
.ANDI: // ---------------------------- ANDI (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst = binary_rep.substring(5, 10);
i_val = binary_rep.substring(10, 26);
cpu.c_mux_B_select = 1;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 0;
cpu.c_RF_write = 1;
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
System.out.println(
"And Immediate: Rdst:"
+ Integer.parseInt(r_dst, 2)
+ ", RA:"
+ cpu.RA
+ ", Immediate Value:"
+ calc_imm_val(i_val));
break;
case definitions
.BGE: // ---------------------------- BGE (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst =
binary_rep.substring(5, 10); // actually r_src_two but i'll call it a dst for simplicity
i_val = binary_rep.substring(10, 26);
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.c_reg_address_B = Integer.parseInt(r_dst, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
cpu.c_mux_B_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 5;
System.out.println(
"Branch if greater than or equal: "
+ cpu.RA
+ ">="
+ cpu.RB
+ ", label:"
+ calc_imm_val(i_val));
break;
case definitions
.ORI: // ---------------------------- ORI (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst = binary_rep.substring(5, 10);
i_val = binary_rep.substring(10, 26);
cpu.c_mux_B_select = 1;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 1;
cpu.c_RF_write = 1;
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
System.out.println(
"Or immediate: Rdst:"
+ Integer.parseInt(i_val, 2)
+ ", RA:"
+ cpu.RA
+ ", Immediate Value:"
+ calc_imm_val(i_val));
break;
case definitions
.STW: // ---------------------------- STW (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst = binary_rep.substring(5, 10);
i_val = binary_rep.substring(10, 26);
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.c_reg_address_B = Integer.parseInt(r_dst, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
cpu.c_ALU_op = 2; // Add
cpu.c_mux_Y_select = 1; // Memory
System.out.println(
"Store value in R"
+ Integer.parseInt(r_dst, 2)
+ " at address: "
+ calc_imm_val(i_val)
+ " in memory");
break;
case definitions
.BLT: // ---------------------------- BLT (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst =
binary_rep.substring(5, 10); // actually r_src_two but i'll call it a dst for simplicity
i_val = binary_rep.substring(10, 26);
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.c_reg_address_B = Integer.parseInt(r_dst, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
cpu.c_mux_B_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 3;
System.out.println(
"Branch if less than: " + cpu.RA + "<" + cpu.RB + ", label:" + calc_imm_val(i_val));
break;
case definitions
.LDW: // ---------------------------- LDW (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst = binary_rep.substring(5, 10);
i_val = binary_rep.substring(10, 26);
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.c_mux_Y_select = 1;
cpu.c_ALU_op = 2;
cpu.c_mux_B_select = 1;
cpu.c_RF_write = 1;
System.out.println(
"Load word: into R:"
+ Integer.parseInt(r_dst, 2)
+ ", Rsrc:"
+ cpu.RA
+ ", offset:"
+ calc_imm_val(i_val));
break;
case definitions
.BNE: // ---------------------------- BNE (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst =
binary_rep.substring(5, 10); // actually r_src_two but i'll call it a dst for simplicity
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.c_reg_address_B = Integer.parseInt(r_dst, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
cpu.c_mux_B_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 9;
System.out.println(
"Branch if not equal: " + cpu.RA + "!=" + cpu.RB + ", label:" + calc_imm_val(i_val));
break;
case definitions
.BEQ: // ---------------------------- BEQ (I-Type) ---------------------------- //
r_src = binary_rep.substring(0, 5);
r_dst =
binary_rep.substring(5, 10); // actually r_src_two but i'll call it a dst for simplicity
cpu.c_reg_address_A = Integer.parseInt(r_src, 2);
cpu.c_reg_address_B = Integer.parseInt(r_dst, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
cpu.c_mux_B_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 8;
System.out.println(
"Branch if equal: " + cpu.RA + "==" + cpu.RB + ", label:" + calc_imm_val(i_val));
break;
case definitions
.R_TYPE: // ---------------------------- R-TYPE (R-Type) ---------------------------- //
String opcode_ext = binary_rep.substring(binary_rep.length() - 12, binary_rep.length() - 6);
String r_src_one = binary_rep.substring(0, 5);
String r_src_two = binary_rep.substring(5, 10); // Don't need atm
String r_dst_one = binary_rep.substring(10, 15);
if (opcode_ext.equals(
definitions.AND)) // -------------------- And (R-Type) -------------------- //
{
cpu.c_mux_B_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 0;
cpu.c_RF_write = 1;
cpu.c_reg_address_A = Integer.parseInt(r_src_one, 2);
cpu.c_reg_address_B = Integer.parseInt(r_src_two, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
System.out.println(
"And: Rdst:" + Integer.parseInt(r_dst_one, 2) + ", RA:" + cpu.RA + ", RB:" + cpu.RB);
} else if (opcode_ext.equals(
definitions.ADD)) // --------------- Add (R-Type) -------------------- //
{
cpu.c_mux_B_select = 0;
cpu.c_ALU_op = 2;
cpu.c_mux_Y_select = 0;
cpu.c_RF_write = 1;
cpu.c_reg_address_A = Integer.parseInt(r_src_one, 2);
cpu.c_reg_address_B = Integer.parseInt(r_src_two, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
System.out.println(
"Add: Rdst:" + Integer.parseInt(r_dst_one, 2) + ", RA:" + cpu.RA + ", RB:" + cpu.RB);
} else if (opcode_ext.equals(
definitions.SUB)) // --------------- Sub (R-Type) -------------------- //
{
cpu.c_mux_B_select = 0;
cpu.c_ALU_op = 6; // ALU operation is subtract (6)
cpu.c_mux_Y_select = 0;
cpu.c_RF_write = 1;
cpu.c_reg_address_A = Integer.parseInt(r_src_one, 2);
cpu.c_reg_address_B = Integer.parseInt(r_src_two, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
System.out.println(
"Sub: Rdst:" + Integer.parseInt(r_dst_one, 2) + ", RA:" + cpu.RA + ", RB:" + cpu.RB);
} else if (opcode_ext.equals(
definitions.OR)) // --------------- Or (R-Type) -------------------- //
{
cpu.c_mux_B_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_ALU_op = 1;
cpu.c_RF_write = 1;
cpu.c_reg_address_A = Integer.parseInt(r_src_one, 2);
cpu.c_reg_address_B = Integer.parseInt(r_src_two, 2);
cpu.RA = cpu.R[cpu.c_reg_address_A];
cpu.RB = cpu.R[cpu.c_reg_address_B];
System.out.println(
"Or: Rdst:" + Integer.parseInt(r_dst_one, 2) + ", RA:" + cpu.RA + ", RB:" + cpu.RB);
}
break;
}
}
