private void splitRegisterInterval(Interval interval, Register reg) {
// collect current usage of registers
initVarsForAlloc(interval);
initUseLists(false);
spillExcludeActiveFixed();
// spillBlockUnhandledFixed(cur);
assert unhandledLists.get(RegisterBinding.Fixed) == Interval.EndMarker
: "must not have unhandled fixed intervals because all fixed intervals have a use at position 0";
spillBlockInactiveFixed(interval);
spillCollectActiveAny();
spillCollectInactiveAny(interval);
if (Debug.isLogEnabled()) {
try (Indent indent2 = Debug.logAndIndent("state of registers:")) {
for (Register register : availableRegs) {
int i = register.number;
try (Indent indent3 =
Debug.logAndIndent(
"reg %d: usePos: %d, blockPos: %d, intervals: ", i, usePos[i], blockPos[i])) {
for (int j = 0; j < spillIntervals[i].size(); j++) {
Debug.log("%d ", spillIntervals[i].get(j).operandNumber);
}
}
}
}
}
// the register must be free at least until this position
boolean needSplit = blockPos[reg.number] <= interval.to();
int splitPos = blockPos[reg.number];
assert splitPos > 0 : "invalid splitPos";
assert needSplit || splitPos > interval.from() : "splitting interval at from";
Debug.log("assigning interval %s to %s", interval, reg);
interval.assignLocation(reg.asValue(interval.kind()));
if (needSplit) {
// register not available for full interval : so split it
splitWhenPartialRegisterAvailable(interval, splitPos);
}
// perform splitting and spilling for all affected intervals
splitAndSpillIntersectingIntervals(reg);
// activate interval
activeLists.addToListSortedByCurrentFromPositions(RegisterBinding.Any, interval);
interval.state = State.Active;
}
