public Branch execute(Processor cpu) {
cpu.flagOp1 = op1.get32(cpu);
cpu.flagResult = (-cpu.flagOp1);
op1.set32(cpu, cpu.flagResult);
cpu.flagIns = UCodes.NEG32;
cpu.flagStatus = OSZAPC;
return Branch.None;
}
public Branch execute(Processor cpu) {
cpu.flagOp1 = (short) op1.get16(cpu);
cpu.flagOp2 = (short) immw;
cpu.flagResult = (short) (cpu.flagOp1 - cpu.flagOp2);
op1.set16(cpu, (short) cpu.flagResult);
cpu.flagIns = UCodes.SUB16;
cpu.flagStatus = OSZAPC;
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
if (op2.get16(cpu) == 0) {
cpu.zf(true);
} else {
cpu.zf(false);
op1.set16(31 - StaticOpcodes.numberOfLeadingZeros(0xFFFF & op2.get16(cpu)));
}
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op2 = cpu.regs[op2Index];
int add = (cpu.cf() ? 1 : 0);
cpu.flagOp1 = op1.get8(cpu);
cpu.flagOp2 = op2.get8();
cpu.flagResult = (byte) (cpu.flagOp1 - (cpu.flagOp2 + add));
op1.set8(cpu, (byte) cpu.flagResult);
cpu.flagIns = UCodes.SBB8;
cpu.flagStatus = OSZAPC;
return Branch.None;
}
public Branch execute(Processor cpu) {
int shift = 1 & 0x1f;
shift %= 16 + 1;
long val = 0xFFFF & op1.get16(cpu);
val |= cpu.cf() ? 1L << 16 : 0;
val = (val << shift) | (val >>> (16 + 1 - shift));
op1.set16(cpu, (short) (int) val);
boolean bit31 = (val & (1L << (16 - 1))) != 0;
boolean bit32 = (val & (1L << (16))) != 0;
cpu.cf(bit32);
if (shift == 1) cpu.of(bit31 ^ bit32);
return Branch.None;
}
public Branch execute(Processor cpu) {
int shift = immb & (32 - 1);
int reg0 = op1.get32(cpu);
int res = (reg0 >>> shift) | (reg0 << (32 - shift));
op1.set32(cpu, res);
boolean bit30 = (res & (1 << (32 - 2))) != 0;
boolean bit31 = (res & (1 << (32 - 1))) != 0;
if (shift > 0) {
cpu.cf = bit31;
cpu.of = bit30 ^ bit31;
cpu.flagStatus &= NOFCF;
}
return Branch.None;
}
public Branch execute(Processor cpu) {
int shift = cpu.r_cl.get8() & (16 - 1);
int reg0 = 0xFFFF & op1.get16(cpu);
int res = (reg0 << shift) | (reg0 >>> (16 - shift));
op1.set16(cpu, (short) res);
boolean bit0 = (res & 1) != 0;
boolean bit31 = (res & (1 << (16 - 1))) != 0;
if ((0x1F & cpu.r_cl.get8()) > 0) {
cpu.cf = bit0;
cpu.of = bit0 ^ bit31;
cpu.flagStatus &= NOFCF;
}
return Branch.None;
}
public Branch execute(Processor cpu) {
cpu.flagOp1 = (byte) op1.get8(cpu);
cpu.flagOp2 = (byte) immb;
cpu.flagResult = (byte) (cpu.flagOp1 - cpu.flagOp2);
cpu.flagIns = UCodes.SUB8;
cpu.flagStatus = OSZAPC;
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
cpu.of = cpu.af = cpu.cf = false;
cpu.flagResult = (byte) (op1.get8() ^ op2.get8(cpu));
op1.set8((byte) cpu.flagResult);
cpu.flagStatus = SZP;
return Branch.None;
}
public Branch execute(Processor cpu) {
double freg0 = cpu.fpu.ST(0);
double freg1 = op1.getF64(cpu);
if ((Double.isInfinite(freg0) && (freg1 == 0.0))
|| (Double.isInfinite(freg1) && (freg0 == 0.0))) cpu.fpu.setInvalidOperation();
cpu.fpu.setST(0, freg0 * freg1);
return Branch.None;
}
public Branch execute(Processor cpu) {
int shift = cpu.r_cl.get8() & 0x1f;
if (shift != 0) {
if (shift <= 16) {
cpu.flagStatus = OSZPC;
} else {
cpu.flagStatus = SZP;
cpu.of = false;
cpu.cf = false;
}
cpu.af = false;
cpu.flagOp1 = op1.get32(cpu);
cpu.flagOp2 = shift;
cpu.flagResult = (cpu.flagOp1 << cpu.flagOp2);
op1.set32(cpu, cpu.flagResult);
cpu.flagIns = UCodes.SHL32;
}
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
cpu.flagOp1 = op1.get32();
cpu.flagOp2 = op2.get32(cpu);
cpu.flagResult = (cpu.flagOp1 - cpu.flagOp2);
op1.set32(cpu.flagResult);
cpu.flagIns = UCodes.SUB32;
cpu.flagStatus = OSZAPC;
return Branch.None;
}
public Branch execute(Processor cpu) {
int selector = op1.get16(cpu) & 0xffff;
if (selector == 0) {
cpu.ldtr = SegmentFactory.NULL_SEGMENT;
} else {
Segment newSegment = cpu.getSegment(selector & ~0x4);
if (newSegment.getType() != 0x02)
throw new ProcessorException(ProcessorException.Type.GENERAL_PROTECTION, selector, true);
if (!(newSegment.isPresent()))
throw new ProcessorException(ProcessorException.Type.GENERAL_PROTECTION, selector, true);
cpu.ldtr = newSegment;
}
return Branch.None;
}
public Branch execute(Processor cpu) {
System.out.println("Warning: Using incomplete opcode: FRSTOR_94");
int addr = op1.get(cpu);
cpu.fpu.setControl(cpu.linearMemory.getWord(addr));
cpu.fpu.setStatus(cpu.linearMemory.getWord(addr + 2));
cpu.fpu.setTagWord(cpu.linearMemory.getWord(addr + 4));
// cpu.linearMemory.setWord(addr + 6, (short) 0 /* cpu.fpu.getIP() offset*/);
// cpu.linearMemory.setWord(addr + 8, (short) 0 /* (selector & 0xFFFF)*/);
// cpu.linearMemory.setWord(addr + 10, (short) 0 /* operand pntr offset*/);
// cpu.linearMemory.setWord(addr + 12, (short) 0 /* operand pntr selector & 0xFFFF*/);
// for (int i = 0; i < 8; i++) {
// byte[] extended = FpuState64.doubleToExtended(fpu.ST(i), false /* this is WRONG!!!!!!!
// */);
// for (int j = 0; j < 10; j++)
// seg0.setByte(addr0 + 14 + j + (10 * i), extended[j]);
// }
return Branch.None;
}
public Branch execute(Processor cpu) {
op1.set8(cpu, (byte) ~op1.get8(cpu));
return Branch.None;
}
public Branch execute(Processor cpu) {
op1.setF80(cpu, cpu.fpu.ST(0));
cpu.fpu.pop();
return Branch.None;
}
public Branch execute(Processor cpu) {
cpu.of = cpu.af = cpu.cf = false;
cpu.flagResult = (op1.get32(cpu) & immd);
cpu.flagStatus = SZP;
return Branch.None;
}
public Branch execute(Processor cpu) {
cpu.push32(op1.get32(cpu));
return Branch.None;
}
public Branch execute(Processor cpu) {
int addr = op1.get(cpu) + op1.getBase(cpu);
cpu.linearMemory.setWord(addr, (short) cpu.idtr.getLimit());
cpu.linearMemory.setDoubleWord(addr + 2, cpu.idtr.getBase() & 0x00ffffff);
return Branch.None;
}
public Branch execute(Processor cpu) {
op1.set16(cpu, (short) cpu.r_eax.get16());
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
op1.set16((short) op2.get16(cpu));
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
int tmp = op2.get32(cpu);
if (!cpu.sf()) op1.set32(tmp);
return Branch.None;
}