public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
cpu.of = cpu.af = cpu.cf = false;
cpu.flagResult = (op1.get32() & immd);
cpu.flagStatus = SZP;
return Branch.None;
}
public Branch execute(Processor cpu) {
Reg op1 = cpu.regs[op1Index];
cpu.of = cpu.af = cpu.cf = false;
cpu.flagResult = (byte) (op1.get8() ^ op2.get8(cpu));
op1.set8((byte) cpu.flagResult);
cpu.flagStatus = SZP;
return Branch.None;
}
public Branch execute(Processor cpu) {
int shift = cpu.r_cl.get8() & 0x1f;
if (shift != 0) {
if (shift <= 16) {
cpu.flagStatus = OSZPC;
} else {
cpu.flagStatus = SZP;
cpu.of = false;
cpu.cf = false;
}
cpu.af = false;
cpu.flagOp1 = op1.get32(cpu);
cpu.flagOp2 = shift;
cpu.flagResult = (cpu.flagOp1 << cpu.flagOp2);
op1.set32(cpu, cpu.flagResult);
cpu.flagIns = UCodes.SHL32;
}
return Branch.None;
}
public Branch execute(Processor cpu) {
cpu.of = cpu.af = cpu.cf = false;
cpu.flagResult = (op1.get32(cpu) & immd);
cpu.flagStatus = SZP;
return Branch.None;
}