/** Memory Access - Stage 4 */
public static void stage4_memory() throws IOException {
String binary_rep = pad_binary(Integer.toBinaryString(cpu.IR), 32);
String op_code = (String) binary_rep.subSequence(binary_rep.length() - 6, binary_rep.length());
if (cpu.c_mux_Y_select == 0) // If mux_Y is 0, use value from ALU (RZ)
{
cpu.RY = cpu.RZ;
} else if (cpu.c_mux_Y_select == 1) // If mux_Y is set to 1, then must use memory
{
if (op_code.equals(definitions.STW)) // If the instruction is a STW (store)
{
pmi.memory_address = cpu.RZ; // memory address = RZ
pmi.memory_data = cpu.RM; // memory data = RM
mem = pmi.write_word(mem); // write memory
} else if (op_code.equals(definitions.LDW)) // If the instruction is a LDW (load)
{
pmi.memory_address = cpu.RZ; // Memory address = RZ
pmi.read_memory(file); // Read memory
cpu.RY = PMI.memory_data; // RY = memory data
}
} else if (cpu.c_mux_Y_select == 2) // PC-Temp (Not required for this assignment)
{
}
}
/** Reset all of the control signals (after each instruction execution in Stage 5) */
public static void reset_control_signals() {
cpu.c_reg_address_A = 0;
cpu.c_reg_address_B = 0;
cpu.c_reg_address_C = 0;
cpu.c_mux_B_select = 0;
cpu.c_mux_C_select = 0;
cpu.c_mux_Y_select = 0;
cpu.c_RF_write = 0;
cpu.c_condition_signal = 0;
cpu.c_ALU_op = 0;
cpu.RA = 0;
cpu.RB = 0;
cpu.RM = 0;
cpu.RY = 0;
cpu.RZ = 0;
}
