Educational software for modeling and simulation of digital circuits.

VHDLLab is a web based IDE for VHDL. It's designed for educational purpose as an alternative to commercial products that provide solution for VHDL.

For the impatient: http://imgur.com/a/CS6zn

The need for VHDLLab appeared at Faculty of Electrical Engineering and Computing, University of Zagreb, Croatia where VHDL was taught in Digital Electronics course. At the time (2006), Xilinx WebISE was used by students for VHDL programming. However, WebISE had a couple of problems when used for educational purposes. One of the big ones was licensing that forbade universities from distributing WebISE to students for work at home. Other problems included: inability to describe circuits using automatons, lots of unnecessary features that distracts students, lots of bugs, huge footprint, etc. VHDLLab was designed as a lightweight alternative to fix those problems as well as add a few other niceties.

VHDLLab is being used at Faculty of Electrical Engineering and Computing, University of Zagreb, Croatia in Digital Electronics course since 2007. Every year approximately 700 students use it to complete programming assignments.

A paper describing VHDLLab, authored by Miro Bezjak, Davor Delač and Aleksandar Prokopec under supervision of mr.sc. Marko Čupić (now dr.sc.), was among the [winners] ra-award of University of Zagreb's Rector's Award in academic year 2007/2008. Paper is [available] ra-paper online as a PDF in Croatian. Paper summary is available both in [Croatian] ra-sum-hr and in [English] ra-sum-en. As a backup, those files are available in award directory. Source files can be obtained by git checkout v1 then navigating to rector directory or via [github] ra-source.

• Low requirement for end users: only JRE 6+
• Create digital circuits by:
  • writing VHDL source code
  • drawing schemes
  • drawing automatons
• Test circuits using testbench editor
• Compile, simulate and view results
• Projects, files and user preferences are stored on server (no manual synchronization is required when end user wants to work from a different location)
• File dependency resolution
• Hierarchical presentation of files in a project
• VHDL source code generation from schematic, automaton or testbench files
• Security (HTTPS, mandatory login, roles)
• Auditing:
  • via project and file snapshots on every change
  • client log output is stored on server

Some features are visible in screenshots.

VHDLLab is in no way a complete replacement for WebISE. Many WebISE's features are missing. It has enough features to be useful in educational setting.

One major limitation is case sensitivity. VHDL is case insensitive, but VHDLLab might not be. That is, majority of code in VHDLLab assumes case insensitivity, but there are no guaranties. Major uncertainty lies with database management system. For that reason, it's advisable to use the same entity/component names throughout VHDLLab editors.

Unfortunately, current state of the build system and the lack of server side code doesn't allow for pre-built WAR application. That might change sometime in the future. Until then, the only way to acquire WAR file is to build it from source code.

Building requires JDK 6+.

1. Download and install GHDL.

2. Acquire VHDLLab source code by either of these methods:

• git clone https://github.com/mbezjak/vhdllab.git
• download tagged version https://github.com/mbezjak/vhdllab/releases
• download latest version https://github.com/mbezjak/vhdllab/zipball/master

3. Copy configuration.properties-sample to configuration.properties and edit it.

4. Create MySQL database named vhdllab with all privileges. Appropriate database structure is created automatically by Hibernate the first time that server application is started. Database name can be changed in configuration.properties.

5. Start build in production profile by executing:

    $ ./gradle -Pprod clean build
   

6. vhdllab.war file was generated in the root VHDLLab directory. Deploy it to Tomcat.

7. End user (e.g. student) installation is simple. Only requirement is JRE 6+. Assuming Tomcat is started on localhost at port 8080, client application can be started by navigation to https://localhost:8080/vhdllab/launch.jnlp.

Note that while developing VHDLLab, there is no need to do steps 5 and 6. They can take a long time. Instead you can run the server in embedded jetty server with ./gradle appRunWar. Client application can then be run or debugged directly from Eclipse by executing vhdllab-client/src/main/java/hr/fer/zemris/vhdllab/platform/Main.java.

VHDLLab consists of server and client application communicating by Spring HTTP Invoker over HTTPS.

Client application is distributed by JNLP. It uses Spring Rich Client and Swing. The use of VHDLLab server is transparent to the end user.

Server application is architected as a service for client application. It has no presentation layer, only service and DAO. It provides a way to: create, update, retrieve projects, files and preferences; compile and simulate VHDL; extract metadata, resolve file dependencies and generate VHDL code. Server application uses Springframework (DI, ORM, AOP, etc.), Spring Security and Hibernate. Recommended DBMS is MySQL.

Server application can be viewed as an example of SAAS.

$ date
Mon Jan 11 11:20:28 CET 2016
$ cloc --exclude-dir=build .
     743 text files.
     732 unique files.
      78 files ignored.

http://cloc.sourceforge.net v 1.64  T=2.40 s (278.0 files/s, 32370.1 lines/s)
--------------------------------------------------------------------------------
Language                      files          blank        comment           code
--------------------------------------------------------------------------------
Java                            620          12755          19804          41607
XML                              19            350            410           1706
HTML                             15              0              0            356
Groovy                            5             49             20            300
Bourne Again Shell                1             19             20            121
SQL                               1             11             18             74
DOS Batch                         1             24              2             64
Bourne Shell                      5             10              8             31
YAML                              1              3              0             13
--------------------------------------------------------------------------------
SUM:                            668          13221          20282          44272
--------------------------------------------------------------------------------

Client side is expected to have JRE 6+ and connectivity to VHDLLab server. That is about it.

Server side requirements are as follows:

• JRE 6+
• Apache Tomcat 6+
• MySQL 5+
• GHDL 0.29+ for VHDL compilation and simulation

Building VHDLLab requires JDK 6+.

A portion of codebase is in Croatian but most is in English. On the other hand, end user interacts with client application exclusively in English. I18N files exist but don't cover 100% of use cases.

It varies. VHDLLab was written by students for students. Many were still learning Java and OOP at the time. That being said, a large portion of VHDLLab was written, then rewritten, and rewritten again. To the point where most of VHDLLab (editor components being a large exception) is in excellent condition.

• Homepage: https://github.com/mbezjak/vhdllab
• Issues: https://github.com/mbezjak/vhdllab/issues
• Changelog: see Changelog.md file
• Roadmap: see Roadmap.md file
• Wiki: https://github.com/mbezjak/vhdllab/wiki
• Mail list: http://groups.google.com/group/vhdllab
• CI Server: http://travis-ci.org/mbezjak/vhdllab
• License: Apache 2.0 (see LICENSE and NOTICE files)

No longer in use, but it could still be useful, at least for historical or sentimental reasons:

• original SVN repository; it's read and write protected: http://morgoth.zemris.fer.hr/svn/vhdllab
• trac project; information present there is mostly in Croatian but it has read access to original SVN repository: http://morgoth.zemris.fer.hr/trac/vhdllab