/** Responsible for traversing within a Module */
@Override
protected void traverse(Module module) {
// Define all feedback points as having 0 depth on their exits
// in order to break the iterative computation.
for (Component comp : module.getFeedbackPoints()) {
for (Exit exit : comp.getExits()) {
exitToGateDepthMap.put(exit, new Integer(0));
}
}
if (!findUnknownGateDepthOnInputs(module)) {
if (_schedule.db) _schedule.ln(_schedule.GDA, "Module Traversal " + module);
if (isForward()) {
traverseModuleForward(module, module.getFeedbackPoints());
} else {
traverseModuleReverse(module, module.getFeedbackPoints());
}
LinkedList<Component> revisitComponents = new LinkedList<Component>();
while (true) {
while (!unresolvedGateDepthComponents.isEmpty()) {
if (unresolvedGateDepthComponents.peek().getOwner() == module) {
revisitComponents.add(unresolvedGateDepthComponents.pop());
} else {
break;
}
}
if (revisitComponents.isEmpty()) {
break;
}
revisitUnknownGateDepthComponents(revisitComponents);
}
}
}
/**
* Utility method for wiring up the reads and writes captured in a frame to appropriate ports and
* buses on a procedure.
*
* @param body DOCUMENT ME!
* @param register DOCUMENT ME!
* @param subFrame DOCUMENT ME!
*/
private void connectRegister(Module body, Register register, ConnectionFrame subFrame) {
// wire all the reads to a new port on the procedure's body
List<Connection> readList = subFrame.getReadConnections(register);
if (!readList.isEmpty()) {
Port resourceRead = body.makeDataPort(Component.SIDEBAND);
Bus resourceReadBus = resourceRead.getPeer();
resourceReadBus.setIDLogical(register.showIDLogical() + "_read");
resourceReadBus.setSize(register.getInitWidth(), Register.isSigned());
recordRead(new RegisterReadConnection(register, resourceRead));
for (Connection readConnections : readList) {
RegisterReadConnection rp = (RegisterReadConnection) readConnections;
rp.getDataPort().setBus(resourceReadBus);
}
}
// wire the writes. a single write goes directly, multiple go through a
// gateway
List<Connection> writeList = subFrame.getWriteConnections(register);
if (!writeList.isEmpty()) {
Exit bodyExit = getSidebandExit(body);
Bus writeEnable = bodyExit.makeDataBus(Component.SIDEBAND);
writeEnable.setIDLogical(register.showIDLogical() + "_enable");
writeEnable.setSize(1, false);
// Port writeEnablePort = writeEnable.getPeer();
Bus writeData = bodyExit.makeDataBus(Component.SIDEBAND);
writeData.setIDLogical(register.showIDLogical() + "_write");
writeData.setSize(register.getInitWidth(), Register.isSigned());
recordWrite(new RegisterWriteConnection(register, writeEnable, writeData));
if (writeList.size() == 1) {
RegisterWriteConnection edp = (RegisterWriteConnection) writeList.get(0);
writeEnable.getPeer().setBus(edp.getEnable());
writeData.getPeer().setBus(edp.getData());
} else {
RegisterGateway regGateway = new RegisterGateway(writeList.size(), register);
writeEnable.getPeer().setBus(regGateway.getGlobalEnableBus());
writeData.getPeer().setBus(regGateway.getGlobalDataBus());
Iterator<Port> gatewayLocalEnablePortIter = regGateway.getLocalEnablePorts().iterator();
Iterator<Port> gatewayLocalDataPortIter = regGateway.getLocalDataPorts().iterator();
// Wires up RegisterGateway's enable ports paired with data
// ports.
int pairCount = 0;
for (Connection connection : writeList) {
RegisterWriteConnection edPair = (RegisterWriteConnection) connection;
edPair.getEnable().setIDLogical(register.showIDLogical() + "_we_" + pairCount);
gatewayLocalEnablePortIter.next().setBus(edPair.getEnable());
edPair.getData().setIDLogical(register.showIDLogical() + "_data_" + pairCount);
gatewayLocalDataPortIter.next().setBus(edPair.getData());
// edPair.getSize().setIDLogical(register.showIDLogical() +
// "_size_" + pairCount);
// ((Port)gatewayLocalSizePortIter.next()).setBus(edPair.getSize());
pairCount++;
}
body.addComponent(regGateway);
}
}
}
